Title :
The linear array systolic tester (LAST)
Author :
Lesmeister, Gary
Author_Institution :
ASIX Syst. Corp., Fremont, CA, USA
Abstract :
A description is given of the LAST system, a linear string of systolic processors connected together to provide a stimulus/response testing function to a device under test (DUT). LAST addresses a major problem in tester design by reducing the data transfer/storage requirements. LAST accomplishes this by converting the rhythm and regularity found in VLSI and ASIC (application-specific integrated circuit) test vector patterns into independent systolic processor rhythms. This rhythm conversion reduces the data processing and handling by orders of magnitude. LAST integrates an APG (automatic pattern generator) function at each channel, which reduces vector memory requirements for the regular test vector structures encountered in today´s ASIC parts
Keywords :
VLSI; application specific integrated circuits; automatic test equipment; automatic testing; cellular arrays; integrated circuit testing; logic testing; ASIC; VLSI; application-specific integrated circuit; automatic pattern generator; data transfer/storage requirements; device under test; linear array systolic tester; rhythm conversion; stimulus/response testing function; systolic processor rhythms; vector memory requirements; vector patterns; Application specific integrated circuits; Automatic test pattern generation; Automatic testing; Circuit testing; Data processing; Integrated circuit testing; Rhythm; System testing; Test pattern generators; Very large scale integration;
Conference_Titel :
Test Conference, 1989. Proceedings. Meeting the Tests of Time., International
Conference_Location :
Washington, DC
DOI :
10.1109/TEST.1989.82338
