A low-voltage, high-gain CMOS operational amplifier for switched-capacitor application in a digital 90nm CMOS process

Author

Khansarizadeh, Atieh S. ; Mirhosseini, S. Hassan ; Mehregan, Saeed

Author_Institution

Dept. of Electr. Eng., Qazvin Islamic Azad Univ. (QIAU), Qazvin, Iran

Volume

1

fYear

2012

Firstpage

76

Lastpage

79

Abstract

This paper discusses the design of low-voltage, high gain, fully differential CMOS Op-amp in a low voltage (V_DD = 1.0V) 90nm CMOS process. This Op-amp is ideally suited for switch-capacitor circuits and simulations show a unity gain bandwidth of 651MHz with 1pF load capacitor and a DC gain of more than 107dB. The phase margin is around 58°. The circuit topology is a two-stage folded cascode structure with regulated cascodes for gain boosting.

Keywords

CMOS digital integrated circuits; operational amplifiers; switched capacitor networks; bandwidth 651 MHz; capacitance 1 pF; circuit topology; digital CMOS process; fully differential CMOS operational-amplifier; high-gain CMOS operational amplifier; load capacitor; low-voltage operational amplifier; phase margin; size 90 nm; switch-capacitor circuits; two-stage folded cascode structure; unity gain bandwidth; voltage 1.0 V; Bandwidth; Boosting; CMOS integrated circuits; CMOS process; Switching circuits; Transistors; Voltage control; Boosting; CMFB; Folded Cascode; Switched-Capacitor;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation & Measurement, Sensor Network and Automation (IMSNA), 2012 International Symposium on

Conference_Location

Sanya

Print_ISBN

978-1-4673-2465-6

Type

conf

DOI

10.1109/MSNA.2012.6324519

Filename

6324519