Title :
How far are LDPC codes from fundamental limits on total power consumption?
Author :
Ganesan, Kavita ; Grover, Pulkit ; Goldsmith, Andrea
Author_Institution :
Univ. of California, Berkeley, Berkeley, CA, USA
Abstract :
In order to minimize the transmit power in a communication system, it is well known that it is optimal to operate close to the channel capacity. Recently derived fundamental limits show that this strategy is not optimal when the goal is to minimize total power consumption, i.e., transmit as well as processing power, because of high decoding complexity close to capacity. This paper investigates how close LDPC codes with corresponding message-passing decoders get to the fundamental limits. We focus on some one-bit decoding algorithms, namely Gallager-A and Gallager-B, to decode LDPC codes. We compute the minimum total (transmit and decoding) power consumed using these two decoding algorithms for two decoding models: first where only the computational nodes consume all the power (the “Node Model”), and next where wires consume all the power (the “Wire Model”). For each model and each decoding algorithm, we compare this minimum total power with the (transmit) power required for uncoded transmission and with fundamental lower bounds on power consumption for these models. In some cases, we observe that the transmit power needs to increase unboundedly in order for the total power to be asymptotically (as Pe → 0) smaller than that for uncoded transmission. We also observe that the power consumed in the Wire Model asymptotically dominates the power consumed in the Node Model, which suggests the importance of characterizing the wiring complexity of decoding, and not just the number of operations.
Keywords :
channel capacity; decoding; parity check codes; Gallager-A; Gallager-B; LDPC codes; channel capacity; communication system; decoding complexity; decoding models; message-passing decoders; node model; one-bit decoding algorithms; total power consumption; transmit power; uncoded transmission; wire model; wiring complexity; Computational modeling; Decoding; Error probability; Integrated circuit modeling; Iterative decoding; Wires;
Conference_Titel :
Communication, Control, and Computing (Allerton), 2012 50th Annual Allerton Conference on
Conference_Location :
Monticello, IL
Print_ISBN :
978-1-4673-4537-8
DOI :
10.1109/Allerton.2012.6483282