On performance estimation of a scalable VLIW soft-core on ALTERA and XILINX FPGA platforms

This paper presents performance estimations for a scalable VLIW soft-core implemented in various XILINX and ALTERA FPGAs. It covers the low-cost low-power devices as well as the latest high-end FPGA families of both providers. The results present the maximal clock frequency of the complete design including the processor core and the code and data memories. In the soft-core scaling experiment, the number of available execution units is scaled from 1 to 12. In the technology scaling experiment, the core was mapped to devices of semiconductor technology nodes from 90 nm down to the latest 28nm technology. The experiments show some interesting behaviour. For example, for small-sized cores the XILINX board outperforms the ALTERA, while for larger sized cores this situation completely changes. Finally, both FPGA platforms and ways of scaling the performance are compared with each other and some conclusions for a design space exploration of soft-cores are presented.