• DocumentCode
    1630637
  • Title

    A case study of trace-driven simulation for analyzing interconnection networks: cc-NUMAs with ILP processors

  • Author

    Puente, V. ; Prellezo, J.M. ; Izu, C. ; Gregorio, J.A. ; Beivide, R.

  • Author_Institution
    Cantabria Univ., Santander, Spain
  • fYear
    2000
  • fDate
    6/22/1905 12:00:00 AM
  • Firstpage
    174
  • Lastpage
    180
  • Abstract
    The evaluation of network performance under real application loads is carried out by detailed time-intensive and resource-intensive simulations. Moreover, the use of ILP (instruction-level parallel) processors in cc-NUMA (cache-coherent non-uniform memory access) architectures introduces non-deterministic memory accesses; the resulting parallel system must be modeled by a detailed execution-driven simulation, further increasing the evaluation cost. This paper introduces a simulation methodology, based on network traces, to estimate the impact that a given network has on the execution time of parallel applications. This methodology allows the study of the network design space with a level of accuracy close to that of execution-driven simulations but with much shorter simulation times. The network trace, extracted from an execution-driven simulation, is processed to substitute the temporal dependencies produced by the simulated network with an estimation of the message dependencies caused by both the application and the applied cache-coherent protocol. This methodology has been tested on two direct networks, with 16 and 64 nodes respectively, running the FFT and Radix applications of the SPLASH2 suite. The trace-driven simulation is 3 to 4 times faster than the execution-driven one, with an average error of 4% in the total execution time
  • Keywords
    cache storage; coherence; fast Fourier transforms; memory protocols; multiprocessor interconnection networks; parallel architectures; performance evaluation; virtual machines; ILP processors; Radix application; SPLASH2 suite; accuracy; cache-coherent nonuniform memory access; cache-coherent protocol; case study; cc-NUMA architectures; evaluation cost; execution-driven simulation; fast Fourier transform; instruction-level parallelism; interconnection network performance evaluation; message dependencies; network design space; network traces; nondeterministic memory accesses; parallel application execution time; resource-intensive simulations; simulation time; temporal dependencies; time-intensive simulations; trace-driven simulation; Analytical models; Computational modeling; Computer aided software engineering; Costs; Electronic mail; Multiprocessor interconnection networks; Performance analysis; Predictive models; Telecommunication traffic; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing, 2000. Proceedings. 8th Euromicro Workshop on
  • Conference_Location
    Rhodos
  • Print_ISBN
    0-7695-0500-7
  • Type

    conf

  • DOI
    10.1109/EMPDP.2000.823409
  • Filename
    823409