BIST pretest of ICs: risks and benefits

The object of this paper is to analyze the potential benefits of conducting a BIST pretest before launching a functional test of ICs during post manufacturing screening. In (Nakamura et al., 2005) the impact of BIST on the chip defect level after test has been addressed. It was assumed in (Nakamura et al., 2005) that no measures are taken to assure that the BIST circuitry is fault-free before launching the functional test. In this paper, we assume that a BIST pretest is first conducted in order to rid of all chips that fail it. Only chips whose BIST circuitry has passed the pretest are kept, while the rest are discarded. The BIST pretest, however, is assumed to have only a limited coverage against its own faults. This paper studies the product quality improvements as induced by the BIST pretest, and provides some insight as to when this pretest maybe worthwhile performing. As the study shows, in many cases the potential benefits outweigh any potential risks