A new technique for probing the energy distribution of positive charges in gate dielectric

Author

Ji, Zhen ; Hatta, S. Wan Muhamad ; Zhang, Jian F. ; Zhang, Wensheng ; Niblock, J. ; Bachmayr, P. ; Stauffer, L. ; Wright, Katie ; Greer, S.

Author_Institution

Sch. of Eng., Liverpool John Moores Univ., Liverpool, UK

fYear

2014

fDate

24-27 March 2014

Firstpage

73

Lastpage

78

Abstract

To simulate the impact of stress-induced positive charges in gate dielectric on devices and circuits, it is essential to know their energy distribution both within and beyond substrate band-gap. A new technique is proposed for measuring this distribution and successfully implemented on industrial parameter analyzer. We demonstrate its generic applicability to both SiON and high-k/SiON stacks and its capability in evaluating different materials and processes. This makes it a useful tool in a typical test laboratory for material and process optimization.

Keywords

elemental semiconductors; energy gap; high-k dielectric thin films; negative bias temperature instability; silicon; silicon compounds; stress analysis; Si; SiON; energy distribution probing; gate dielectric; high-k stacks; industrial parameter analyzer; material optimization; negative bias temperature instability; process optimization; stress-induced positive charges; substrate band-gap; Current measurement; High K dielectric materials; Logic gates; MOSFET circuits; Sensors; Time measurement; Energy distributions; energy profiles; hole traps; negative bias temperature instability (NBTI); positive charges;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures (ICMTS), 2014 International Conference on

Conference_Location

Udine

ISSN

1071-9032

Print_ISBN

978-1-4799-2193-5

Type

conf

DOI

10.1109/ICMTS.2014.6841470

Filename

6841470