Title :
Processor yield at 14nm and beyond
Author_Institution :
R&D, ARM Austin, Austin, TX, USA
Abstract :
This paper discusses process integration and yield issues in advanced technology nodes and examines the related concerns and opportunities in the test structure field.
Keywords :
integrated circuit testing; microprocessor chips; advanced technology nodes; process integration; processor yield; size 14 nm; test structure field; Delays; FinFETs; Layout; Logic gates; Market research; Metals;
Conference_Titel :
Microelectronic Test Structures (ICMTS), 2014 International Conference on
Conference_Location :
Udine
Print_ISBN :
978-1-4799-2193-5
DOI :
10.1109/ICMTS.2014.6841477
