New robust 200mV sub-threshold full adders

In this paper, two novel structures at 200mV 0.18um sub-threshold full adders are proposed for wireless sensor network nodes or medical electronics. They use three state gate to enhance the transition time and drivability of carry out signal. Simulation results show that the transition time of the proposed structure using three state gate is 60% of that of old structure using transmission gate. The proposed full adders are employed in an 8-bit ripple carry adder and the simulation results exhibit 20% power saving and 34% Power-Delay Product (PDP) saving compared to typical CMOS adder.