• DocumentCode
    1631207
  • Title

    SASPL: a test program productivity analysis tool

  • Author

    Paradis, Eric ; Stannard, David

  • Author_Institution
    Mitel SCC, Bromont, Que., Canada
  • fYear
    1989
  • Firstpage
    577
  • Lastpage
    584
  • Abstract
    SASPL, a test program statistical analysis simulator for analyzing existing test programs to increase productivity, is presented. This method was created in a way that would allow it to be integrated into an existing CAE/CAM (computer-aided engineering and manufacturing) environment. The authors describe SASPL, together with results obtained through its use on a variety of production telecommunication (mixed analog and digital) circuits. SASPL targets reducing the production test overhead, by identifying the production test´s inefficiencies, for devices having working test programs and for which there is probably no intention of redesign (in order to take advantage of test time reduction through design for test methods). It is hoped that this information, when fed back to the test engineer, will allow future test programs to be more efficient when first written
  • Keywords
    automatic test equipment; digital simulation; electronic engineering computing; integrated circuit testing; production testing; statistical analysis; telecommunication equipment; telecommunications computing; CAE/CAM; SASPL; mixed analogue digital circuits; production test; statistical analysis simulator; telecommunication circuits; test program productivity analysis; Analytical models; CADCAM; Circuit testing; Computational modeling; Computer aided engineering; Computer aided manufacturing; Production; Productivity; Statistical analysis; Telecommunication computing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 1989. Proceedings. Meeting the Tests of Time., International
  • Conference_Location
    Washington, DC
  • Type

    conf

  • DOI
    10.1109/TEST.1989.82343
  • Filename
    82343