Comparison of the on-resistance degradation in pLEDMOS with the different geometrical parameters

Author

Sun, Hu ; Qian, Qin-Song ; Sun, Wei-Feng ; Liu, Si-Yang

Author_Institution

Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China

fYear

2010

Firstpage

1619

Lastpage

1623

Abstract

In this paper, the influence of the different length of the drift region and the field plate upon Hot-Carrier-Induced on-resistance (Ron) and threshold voltage (Vth) degradation in p-type lateral extended drain MOS (pLEDMOS) transistor with thick gate oxide has been investigated. It was concluded that increasing the length of drift region can reduce the Ron degradation but enhance the Vth degradation. However, increasing the length of field plate can reduce the degradation of both Ron and Vth. Technology computer-aided design (TCAD) simulations reveal that the improvement is due to the decrease of impact ionization rate and perpendicular electric field in the accumulation and channel region. It also has been found in this paper that hot carrier injection mostly appears in the first 10³s and then begins to saturate.

Keywords

MOSFET; hot carriers; semiconductor device models; technology CAD (electronics); drift region; electric field; geometrical parameters; hot-carrier-induced on-resistance; p-type lateral extended drain MOS; pLEDMOS transistor; technology computer-aided design; Degradation; Electric fields; Hot carriers; Impact ionization; Logic gates; Stress; Transistors; hot-carrier-induced degradation; on-resistance degradation; p-type lateral extended drain MOS (pLEDMOS); thick gate oxide;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on

Conference_Location

Shanghai

Print_ISBN

978-1-4244-5797-7

Type

conf

DOI

10.1109/ICSICT.2010.5667423

Filename

5667423