• DocumentCode
    1631544
  • Title

    Robust test generation for precise crosstalk-induced path delay faults

  • Author

    Li, Huawei ; Shen, Peifu ; Li, Xiaowei

  • Author_Institution
    Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing
  • fYear
    2006
  • Lastpage
    305
  • Abstract
    Crosstalk-induced delay should be tested for high-speed circuits. We propose a robust test generation technique based on a single precise crosstalk-induced path delay fault model, S-PCPDF model. The path sensitization criterion of robust test generation for a target S-PCPDF is defined separately for sensitizing the path under test and sensitizing the sub-path to propagate aggressor transitions. Experimental results showed that the proposed technique can be applied to circuits of reasonable sizes within an acceptable time. The average test efficiency is high
  • Keywords
    automatic test pattern generation; crosstalk; very high speed integrated circuits; S-PCPDF model; VLSI systems; aggressor transitions; average test efficiency; high speed circuits; path sensitization criterion; precise crosstalk-induced path delay faults; robust test generation; Automatic test pattern generation; Circuit faults; Circuit noise; Circuit testing; Coupling circuits; Crosstalk; Delay effects; Robustness; Timing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Test Symposium, 2006. Proceedings. 24th IEEE
  • Conference_Location
    Berkeley, CA
  • Print_ISBN
    0-7695-2514-8
  • Type

    conf

  • DOI
    10.1109/VTS.2006.60
  • Filename
    1617608