Cascode configuration as a substitute to LDE MOSFET for improved electrical mismatch performance

The work presented in this paper investigates the possibility of replacing a Lateral Drain Extended MOS (LDEMOS) SOI transistors by a cascode configuration to improve the electrical mismatch performance. The cascode connection of two MOS devices is known to sustain as high drain voltage as LDEMOS SOI transistors and offers the same mismatch robustness of Silicon On Insulator (SOI) MOS transistors. The individual mismatch constants associated to Vt (iA_Δvt), β (iA_Δβ/β) and Id (iA_ΔId/Id) for the presented cascode configuration are shown to have similar values to those reported for individual MOS devices.