DocumentCode :
1631647
Title :
The Pensieve project: a compiler infrastructure for memory models
Author :
Wong, Chi-Leung ; Sura, Zehra ; Fang, Xing ; Midkiff, Samuel P. ; Lee, Jaejin ; Padua, David
Author_Institution :
Illinois Univ., Urbana, IL, USA
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
209
Lastpage :
214
Abstract :
The design of memory consistency models for both hardware and software is a difficult task. It is particularly difficult for a programming language because the target audience is much wider than the target audience for a machine language, making usability a more important criterion. Adding to this problem is the fact that the programming language community has little experience with designing programming language consistency models, and therefore each new attempt is very much a voyage into uncharted territory. A concrete example of the difficulties of the task is the current Java memory model. Although designed to be easy to use by Java programmers, it is poorly understood, and at least one common idiom (the "double-check idiom") to exploit the model is unsafe. In this paper, we describe the design of an optimizing Java compiler that accepts, as either input or as an interface implementation, a consistency model for the code to be compiled. The compiler uses escape analysis, D. Shasha and M. Snir\´s (1988) delay set analysis, and our own CSSA (concurrent static single assignment) program representation to normalize the effects of different consistency models on optimizations and analysis. The compiler is intended to serve as a testbed to prototype new memory models and to measure the differences between different memory models in terms of program performance
Keywords :
Java; delays; optimising compilers; software performance evaluation; software prototyping; storage management; CSSA program representation; Java memory model; Pensieve project; compiler infrastructure; concurrent static single assignment; delay set analysis; double-check idiom; escape analysis; interface implementation; memory consistency models; memory model prototyping; normalized effects; optimizing Java compiler; program performance; programming languages; target audience; unsafe idiom; usability; Computer languages; Concrete; Delay effects; Design optimization; Hardware; Java; Optimizing compilers; Program processors; Programming profession; Usability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Architectures, Algorithms and Networks, 2002. I-SPAN '02. Proceedings. International Symposium on
Conference_Location :
Makati City, Metro Manila
ISSN :
1087-4089
Print_ISBN :
0-7695-1579-7
Type :
conf
DOI :
10.1109/ISPAN.2002.1004288
Filename :
1004288
Link To Document :
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