Title :
A period tracking based on-chip sinusoidal jitter extraction technique
Author :
Kuo, C.Y. ; Huang, J.L.
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei
Abstract :
In this paper, an on-chip sinusoidal jitter extraction technique based on period tracking is presented. The proposed technique is a viable on-chip solution. It utilizes a variable delay line and a phase comparator to track the signal´s cycle lengths without external reference. Digital signal processing techniques are then applied to the obtained signal period sequence to derive the amplitudes and frequencies of the sinusoidal jitter components. Numerical simulations are performed to validate the idea. The results show that the proposed approach can achieve high amplitude and frequency estimation accuracy and is robust in the presence of random jitter components and delay line variations
Keywords :
built-in self test; jitter; phase comparators; signal processing; built-in self-diagnosis; built-in self-test; cycle lengths; delay line variations; digital signal processing; on-chip sinusoidal jitter extraction; period tracking; phase comparator; random jitter components; variable delay line; Clocks; Delay lines; Frequency estimation; Intersymbol interference; Jitter; Signal resolution; System performance; Test equipment; Testing; Time measurement; built-in; built-in self-diagnosis.; jitter decomposition; self-test; sinusoidal jitter;
Conference_Titel :
VLSI Test Symposium, 2006. Proceedings. 24th IEEE
Conference_Location :
Berkeley, CA
Print_ISBN :
0-7695-2514-8
DOI :
10.1109/VTS.2006.10
