Title :
Probabilistic performance of write-once memory with Linear Wom codes — Analysis and insights
Author :
Berman, Amit ; Birk, Yitzhak ; Rottenstreich, Ori
Author_Institution :
Electr. Eng. Dept., Technion - Israel Inst. of Technol., Haifa, Israel
Abstract :
The level of write-once memory cells (e.g., Flash) can only be raised individually. Bulk erasure is possible, but only a number of times (endurance) that decreases sharply with increasing cell capacity or cell-size reduction. A device´s declared storage capacity and the total amount of information that can be written to it over its lifetime thus jointly characterize it. Write-once memory (WOM) coding permits a trade-off between these, enabling multiple writes between erasures. The guaranteed (over data) number of such writes is presently considered the important measure. We observe that given the typical endurance (104-105 for Flash), the actual write capacity is very close to its mean value with extremely high probability, rendering the mean number of writes between erasures much more interesting than its guaranteed value in any practical setting. For the Linear WOM code, we derive the write capacity CDF, and show that even the nearly guaranteed number of writes between erasures is substantially larger than the guaranteed one. Based on this, we present Piecewise Linear WOM code, whereby a page is partitioned into numerous independent WOM segments (whose writes must all succeed), permitting a flexible storage/write capacity tradeoff. We show that the aforementioned behavior is preserved. Finally, we outline an extension to Multi-Level cells.
Keywords :
flash memories; linear codes; performance evaluation; piecewise linear techniques; probability; write-once storage; WOM segments; cell capacity; cell-size reduction; device declared storage capacity; flexible storage-write capacity tradeoff; guaranteed number; linear WOM codes; multilevel cells; piecewise linear WOM code; probabilistic performance; write capacity CDF; write-once memory coding; Encoding; Indexes; Law; Markov processes; Probabilistic logic; Writing; Endurance; Flash Memory; Piecewise Scheme; Probabilistic Analysis; Write-once Memory (WOM) Codes;
Conference_Titel :
Communication, Control, and Computing (Allerton), 2012 50th Annual Allerton Conference on
Conference_Location :
Monticello, IL
Print_ISBN :
978-1-4673-4537-8
DOI :
10.1109/Allerton.2012.6483347