DocumentCode
163225
Title
A study on reconfiguring on-chip cache with nonvolatile memory
Author
Mingqian Wang ; Zhaolin Sun ; Jietao Diao ; Xi Wang ; Nan Li ; Kai Bu
Author_Institution
Coll. of Electron. Sci. & Eng., Nat. Univ. of Defense Technol., Changsha, China
fYear
2014
fDate
14-16 May 2014
Firstpage
97
Lastpage
99
Abstract
NVM has become a promising technology to partly replace SRAM as on-chip cache and reduce the gap between the core and cache. To take all advantages of NVM and SRAM, we propose a Hybrid Cache, constructing on-chip cache hierarchies with different technologies. As shown in article, hybrid cache performance and power consumption of Hybrid Cache have a large advantage over caches base on single technologies. In addition, we have shown some other methods that can optimize the performance of hybrid cache.
Keywords
SRAM chips; cache storage; performance evaluation; NVM; SRAM; hybrid cache performance optimization; on-chip cache hierarchies; on-chip cache reconfiguration; power consumption; Hybrid Cache; NVM; architecture; performance; power consumption;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Science and Software Engineering (JCSSE), 2014 11th International Joint Conference on
Conference_Location
Chon Buri
Print_ISBN
978-1-4799-5821-4
Type
conf
DOI
10.1109/JCSSE.2014.6841849
Filename
6841849
Link To Document