Title :
The architecture and optimisation of systolic ring processors for matrix computations
Author :
Marwood, W. ; Beaumont-Smith, A.
Author_Institution :
Centre for Gallium Arsenide VLSI Technol., Adelaide Univ., SA, Australia
Abstract :
The architecture of a character-serial systolic ring floating point multiply-accumulator is described. The performance of a rectangular systolic array of these processors is analyzed. The analysis may be used to optimize the specifications of the arithmetic elements under the particular constraints of area and bandwidth. An optimum architecture is defined for a particular class of gallium arsenide logic
Keywords :
digital arithmetic; systolic arrays; GaAs logic; area; arithmetic elements; bandwidth; floating point multiply-accumulator; matrix computations; rectangular systolic array; specifications; systolic ring processors; Arithmetic; Bandwidth; Clocks; Computer architecture; Engines; Gallium arsenide; Performance analysis; Systolic arrays; Transmission line matrix methods; Very large scale integration;
Conference_Titel :
TENCON '92. ''Technology Enabling Tomorrow : Computers, Communications and Automation towards the 21st Century.' 1992 IEEE Region 10 International Conference.
Conference_Location :
Melbourne, Vic.
Print_ISBN :
0-7803-0849-2
DOI :
10.1109/TENCON.1992.271873
