DocumentCode :
1632471
Title :
Ge/SiO2 low temperature wafer bonding
Author :
Shen, Jian Xin ; Zhang, Xuan Xiong ; Ye, Tian Chun ; Zhuang, Songlin
Author_Institution :
Shanghai Key Lab. of Modern Opt. Syst., Univ. of Shanghai for Sci. & Technol., Shanghai, China
fYear :
2010
Firstpage :
1557
Lastpage :
1559
Abstract :
Atomic level Ge/SiO2 direct wafer bonding was achieved at 150°C. The microstructures of the bonding interface were characterized by transmission electron microscopy. Our investigation indicated that the completed Ge/SiO2 bonding interface without nano-gaps can be required only if the proper pretreatment was applied. That is probable reason that the high defect (a great number of pits) density on the surface of the transferred Ge layer in GeOI was caused through these buried interface nano-gaps which were invisible by an infrared inspect due to the limited resolution.
Keywords :
wafer bonding; Ge-SiO2; bonding interface; direct wafer bonding; low temperature wafer bonding; microstructures; nanogaps; transmission electron microscopy; Annealing; Atomic layer deposition; Bonding; Germanium; Silicon; Silicon on insulator technology; Wafer bonding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
Type :
conf
DOI :
10.1109/ICSICT.2010.5667474
Filename :
5667474
Link To Document :
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