Title :
Bias circuit for high yield self-bias MMIC amplifier for APAAs
Author :
Yamanaka, K. ; Mori, K. ; Ikematsu, H. ; Sasaki, Y. ; Nakayama, M.
Abstract :
In this paper, a Ka-band self-bias low-noise MMIC amplifier is presented, which is equipped with a bias circuit that compensates for the gain variation of the self-bias amplifier between chips due to process variations. The Ka-band low noise MMIC amplifier, with proposed bias circuit, was designed and manufactured. It was proved that the proposed bias circuit reduced the gain variation between chips from 0.8 dB RMS to 0.3 dB RMS. This amplifier is suitable for active phased array applications.
Keywords :
MIMIC; MMIC amplifiers; active antenna arrays; antenna phased arrays; integrated circuit design; integrated circuit measurement; millimetre wave amplifiers; APAA; Ka-band low-noise amplifiers; active phased array antenna systems; chip gain variation compensation circuits; gain variation reduction; high-yield self-bias MMIC amplifier bias circuits; process variations; Antenna arrays; Circuit noise; Costs; FETs; Feedback circuits; Low-noise amplifiers; MMICs; Phased arrays; Resistors; Voltage;
Conference_Titel :
Microwave Symposium Digest, 2003 IEEE MTT-S International
Conference_Location :
Philadelphia, PA, USA
Print_ISBN :
0-7803-7695-1
DOI :
10.1109/MWSYM.2003.1210897
