Fault tolerant linear state machines

In this paper, a new method for the design of fault-tolerant linear state machines with initial state 0 and one-dimensional input and one-dimensional output is proposed. It is shown that the LFSR-implementation of the transfer function of a linear automaton can be utilized to correct transient errors in the memory elements. Since the state vector of a linear automaton is uniquely determined by the last n inputs and outputs, a transient error in a memory element can be corrected within n clock cycles by use of the corrected output symbols, where n is the number of components of the state vector. Experimental results have shown that the lowest area overhead can be obtained if the linear state machine is duplicated and a single parity bit is used to distinguish which of the duplicated machines is correct. In this case, an area overhead of 177 % for an 8-bit state vector and 160% for a 256-bit state vector is achieved.