On the dynamic performance of high-speed ADC architectures

For wideband radio and high-speed Internet access applications the ADC is a crucial building block and a high SNDR over a wide signal band is required. However, most publications on ADCs have not focused on improving the dynamic range at high signal frequencies and they do not meet the requirements for wideband radio and high-speed Internet access applications. This paper presents a tutorial discussion on high-speed CMOS ADCs concerning the dynamic performance and points out some fundamental limitations of different architectures in order to achieve high dynamic performance over a wide signal band