DocumentCode
1634105
Title
Future High density Memory with Vertical structured device technology
Author
Endoh, Tetsuo
Author_Institution
Center for Interdiscipl. Res., Tohoku Univ., Sendai, Japan
fYear
2010
Firstpage
1051
Lastpage
1054
Abstract
For the past thirty years, the downscaling has been the guiding principle in the field of High-density semiconductor memories. However, recently, the limit of planar bulk MOSFETs is becoming apparent. Therefore, in order to extend the scalability of memory technology to the nano-scale generation, a new device structure is necessary. From the viewpoint, I will discuss future High density Memory with Vertical structured device technology.
Keywords
MOSFET; semiconductor storage; high density memory; planar bulk MOSFET; semiconductor memories; vertical structured device technology; Arrays; Memory architecture; Microprocessors; Random access memory; Silicon; Three dimensional displays;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-5797-7
Type
conf
DOI
10.1109/ICSICT.2010.5667541
Filename
5667541
Link To Document