Power dissipation analysis for island-style FPGA architecture

Author

Chtourou, Sonda ; Marrakchi, Z. ; Abid, Mohamed ; Mehrez, H.

Author_Institution

CES Res. Lab., Univ. of Sfax, Sfax, Tunisia

fYear

2014

fDate

1-3 April 2014

Firstpage

1

Lastpage

4

Abstract

In this paper, we consider FPGA architecture optimization to reduce power consumption. We study two FPGA routing architectures. The first architecture uses bidirectional Switch Box (SB) implemented using back-to-back tri-state drivers. The second one uses bidirectional SB implemented using tri-states and multiplexors. Experimentation shows that when we use bidirectional SB based on tri-states and multiplexers, power is reduced by 47% compared to SB implemented using back-to-back tri-state drivers. Furthermore, we show that larger circuits tend to realize larger power savings.

Keywords

circuit optimisation; driver circuits; energy conservation; field programmable gate arrays; logic design; low-power electronics; multiplying circuits; network routing; power consumption; FPGA architecture optimization; FPGA routing architectures; SB; back-to-back tristate drivers; bidirectional switch box; island-style FPGA architecture; multiplexers; power consumption; power dissipation analysis; power savings; Computer architecture; Field programmable gate arrays; Multiplexing; Power demand; Routing; Switches; Wires; FPGA; architecture; power consumption; power estimation model;

fLanguage

English

Publisher

ieee

Conference_Titel

Information and Communication Systems (ICICS), 2014 5th International Conference on

Conference_Location

Irbid

Print_ISBN

978-1-4799-3022-7

Type

conf

DOI

10.1109/IACS.2014.6841956

Filename

6841956