Title :
A 9ns Electrically Erasable Cmos Programmable Logic Device
Author :
Bowden, S.H. ; Darling, R.D. ; Josephson, G.R. ; Rutledge, D.L.
Author_Institution :
Lattice Semiconductor Corp., Hillsboro, OR
Keywords :
CMOS technology; Circuits; Delay; Josephson junctions; Lattices; Logic devices; Programmable logic arrays; Programmable logic devices; Testing; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1988. Digest of Technical Papers. ISSCC. 1988 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1988.663672
