DocumentCode
1635218
Title
A low-power 435-MHz SOI CMOS LNA and mixer
Author
Zencir, E. ; Dogan, N.S. ; Arvas, E.
Author_Institution
Dept. of Electr. Eng., North Carolina A&T State Univ., Greensboro, NC, USA
Volume
1
fYear
2003
Firstpage
555
Abstract
A low-power 435-MHz single-ended low-noise amplifier and a double-balanced mixer was implemented in a 0.35-/spl mu/m Silicon On Insulator (SOI) CMOS process. The single-ended LNA has a measured noise figure of 2.91 dB, and the mixer has an input third-order intercept point of +20 dBm. Total power dissipation of the LNA and mixer is 24 mW from a 2.5-V supply. This is the first LNA-mixer pair implemented at 435 MHz using an SOI CMOS process.
Keywords
CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; UHF mixers; integrated circuit design; integrated circuit noise; low-power electronics; silicon-on-insulator; 0.35 micron; 2.5 V; 2.91 dB; 24 mW; 435 MHz; LNA-mixer pair; RFIC; SOI CMOS LNA; SOI CMOS mixer; Si; double-balanced mixer; low-noise amplifier; low-power LNA; low-power mixer; single-ended LNA; CMOS analog integrated circuits; CMOS process; Capacitance; Conductivity; Crosstalk; Inductors; Noise reduction; Q factor; Radio frequency; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2003 IEEE MTT-S International
Conference_Location
Philadelphia, PA, USA
ISSN
0149-645X
Print_ISBN
0-7803-7695-1
Type
conf
DOI
10.1109/MWSYM.2003.1210999
Filename
1210999
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