Title :
Automating ASIC design-for-testability-the VLSI Test Assistant
Author :
Samad, Arif ; Bell, Martin
Author_Institution :
VLSI Technol. Inc., San Jose, CA, USA
Abstract :
A description is given of the VLSI Test Assistant, an interactive CAD (computer-aided design) tool which automatically adds testability logic to application-specific integrated circuits. In order to give the designer complete control over the hardware modification process the Test Assistant allows the designer to override any of the decisions made by it. Furthermore, the schematics that are generated for the modified circuit allow the user to see the added hardware. The current version of the Test Assistant supports functional block isolation using multiplexers and built-in self-test for RAMs
Keywords :
VLSI; application specific integrated circuits; automatic testing; circuit CAD; integrated circuit testing; integrated memory circuits; logic CAD; logic testing; random-access storage; ASIC design-for-testability; ATE; RAMs; VLSI; automatic testing; built-in self-test; interactive CAD; multiplexers; testability logic; Application specific integrated circuits; Automatic logic units; Automatic testing; Circuit testing; Design automation; Hardware; Integrated circuit testing; Logic design; Logic testing; Very large scale integration;
Conference_Titel :
Test Conference, 1989. Proceedings. Meeting the Tests of Time., International
Conference_Location :
Washington, DC
DOI :
10.1109/TEST.1989.82371
