• DocumentCode
    1635500
  • Title

    TaN Etch in CF4/CHF3 gas for MEMS/Sensor application

  • Author

    Kang, Xiaoxu ; Wang, Weijun ; Li, Quanbo ; Li, Jiaqing ; Yuan, Chao

  • Author_Institution
    Shanghai IC R&D Center, Shanghai, China
  • fYear
    2010
  • Firstpage
    1413
  • Lastpage
    1415
  • Abstract
    TaN was widely used as Cu diffusion barrier in CMOS Cu-BEOL technology, in which it was removed by CMP process. Some work was done on TaN etch by Br/Cl-based gas for metal gate application. But seldom work was done for TaN etch in CF-based gas. In this work TaN etching in CF4/CHF3 gas was investigated on CVD alpha-Si substrate for CMOS compatible MEMS/Sensor application. To avoid resist poisoning problem of metal nitrides, a thin layer of SiON and oxide was deposited on TaN. The patterning sequence included 248 nm lithography, etching thin SiON and oxide, followed by TaN etching. It was found serious residue problem on the unpatterned area. After EDX check, Ta was found in the residue. Assumption was made for the mechanism of residue formation. Based on this model, the process was optimized and a 4-step etching process was developed. The main feature of this process is TaN etching in CF4/CHF3 gas with low power and pressure including a post-etching de-fencing process to solve the residue problem. The optimized process can well control the TaN etching profile and Si loss during TaN over-etch, and was successfully used in the MEMS/Sensor patterning process.
  • Keywords
    CMOS integrated circuits; X-ray chemical analysis; chemical mechanical polishing; chemical vapour deposition; copper; diffusion barriers; etching; lithography; microsensors; resists; silicon compounds; substrates; tantalum compounds; CMOS compatible MEMS/sensor application; CMOS copper-BEOL technology; CMP process; CVD alpha-silicon substrate; Cu; EDX check; MEMS/sensor patterning process; SiON; TaN; diffusion barrier; etching process; lithography; metal gate application; metal nitrides; patterning sequence; post-etching defencing process; residue formation; resist poisoning problem; Argon; Etching; Logic gates; Metals; Micromechanical devices; Resistors; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-5797-7
  • Type

    conf

  • DOI
    10.1109/ICSICT.2010.5667597
  • Filename
    5667597