Title :
Graph-based individual representation for evolutionary synthesis of arithmetic circuits
Author :
Homma, Naofumi ; Aoki, Takafumi ; Higuchi, Tatsuo
Author_Institution :
Graduate Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
fDate :
6/24/1905 12:00:00 AM
Abstract :
This paper presents a graph-based evolutionary optimization technique, called evolutionary graph generation (EGG), to synthesize arithmetic circuits. The potential capability of EGG has been investigated through an experiment of synthesizing fast constant-coefficient multipliers
Keywords :
circuit CAD; digital arithmetic; genetic algorithms; arithmetic circuits; constant-coefficient multipliers; evolutionary graph generation; graph-based evolutionary optimization; Algorithm design and analysis; Circuit synthesis; Digital arithmetic; Genetic algorithms; Genetic programming; High level synthesis; Libraries; Logic circuits; Signal processing algorithms; Tree graphs;
Conference_Titel :
Evolutionary Computation, 2002. CEC '02. Proceedings of the 2002 Congress on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-7803-7282-4
DOI :
10.1109/CEC.2002.1004463
