DocumentCode :
1635847
Title :
Noise, spur characteristics and in-lock error reduction of DLL-based frequency synthesizers
Author :
Zhuang, Jingcheng ; Du, Qingiin ; Kwasniewski, Tad
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
Volume :
2
fYear :
2004
Firstpage :
1443
Abstract :
Noise transfer characteristics of a delay-locked loop and the spur characteristics of a DLL-based frequency synthesizer are analyzed in this paper. Analysis shows that the DLL itself has no ability to suppress the external noise and the in-lock error greatly affects the output spur of a DLL-based frequency synthesizer. The technique for in-lock error reduction, which employs a highly symmetric charge pump phase comparator, is thus introduced and compared with a conventional one. This technique is verified by the measurement results.
Keywords :
delay lock loops; frequency synthesizers; phase comparators; DLL; delay-locked loop; frequency synthesizer; in-lock error reduction; noise transfer characteristics; spur characteristics; symmetric charge pump phase comparator; Charge pumps; Delay lines; Frequency synthesizers; Jitter; Low-frequency noise; Noise reduction; Performance analysis; Phase locked loops; Transfer functions; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems, 2004. ICCCAS 2004. 2004 International Conference on
Print_ISBN :
0-7803-8647-7
Type :
conf
DOI :
10.1109/ICCCAS.2004.1346446
Filename :
1346446
Link To Document :
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