• DocumentCode
    1635951
  • Title

    A novel planar-type body-connected FinFET device fabricated by self-align isolation-last process

  • Author

    Lin, Po-Hsieh ; Lin, Jyi-Tsong ; Chang, Yu-Che ; Eng, Yi-Chuen ; Chen, Hsuan-Hsu

  • Author_Institution
    Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
  • fYear
    2010
  • Firstpage
    1235
  • Lastpage
    1237
  • Abstract
    A new planar-type body-connected FinFET structure produced by the isolation-last self-align process is demonstrated and characterized by using three-dimensional (3-D) numerical simulations. The new process step first defines the gate region and then the active region, thus it can achieve fully self-alignment undoubtedly. Besides, due to the isolation-last process (ILP), an additional body region (ABR) is exhibited under the gate region thereby improving the device electrical characteristics and the subthreshold properties. Its DIBL and subthreshold swing becomes better compared with its counterpart because the lower source/drain resistance and the wider device effective-width can be obtained. For the same reason, this new device shows a higher transconductance (GM) behavior. And its drain conductance (GD) also maintains a good electrical performance with no kink effect compared with the planar-type single top-gate FinFET. With ABR under the gate layer, the lattice temperature is decreased and the thermal instability is alleviated compared with its counterpart.
  • Keywords
    MOSFET; electric admittance; electric resistance; isolation technology; numerical analysis; semiconductor device models; 3D numerical simulation; ABR; DIBL; additional body region; drain conductance; fin field-effect transistor; planar-type body-connected FinFET device; self-align isolation-last process; source-drain resistance; subthreshold swing; three-dimensional numerical simulation; transconductance; Body regions; Capacitance; Fabrication; FinFETs; Immune system; Logic gates; Performance evaluation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-5797-7
  • Type

    conf

  • DOI
    10.1109/ICSICT.2010.5667616
  • Filename
    5667616