Straightforward transient and noise analysis for /spl Sigma//spl Delta/ PLL-based synthesizers of multiple feedback and feedforward structures

This paper presents a noise analysis model, which allows basic phase noise calculations of a /spl Sigma//spl Delta/ PLL fractional-N synthesizer. Calculation results on various /spl Sigma//spl Delta/ orders of multiple architectures, feedback and feedforward, and on transient processes, which provides quick visualization of the design methods used to minimize the required settling-time, are presented.