DocumentCode
1636140
Title
Multiple-chip module design optimizations using a novel layout parameterization technique
Author
Chun-Wen Huang ; Dow, G.S. ; Jianwen Bao ; Kuran, S. ; Sercu, J.
Author_Institution
Anadigics Inc., Warren, NJ, USA
Volume
1
fYear
2003
Abstract
A novel layout parameterization technique for multi-chip module design optimizations is presented. This technique is based on a quasi-static method of moments and multi-dimensional interpolation, which can reduce a 12-minute electromagnetic layout simulation to 5.3 seconds. Excellent CDMA power amplifier (PA) module performance is achieved based on this technique.
Keywords
S-parameters; circuit layout CAD; circuit optimisation; interpolation; method of moments; multichip modules; power amplifiers; radiofrequency amplifiers; CDMA power amplifier module; MCM design optimizations; S-parameter interpolation; electromagnetic layout simulation; layout parameterization technique; multi-chip module design; multi-dimensional interpolation; quasi-static MoM; quasi-static method of moments; Circuit optimization; Circuit simulation; Computational modeling; Design optimization; Interpolation; Microwave circuits; Moment methods; Multiaccess communication; Radio frequency; Scattering parameters;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2003 IEEE MTT-S International
Conference_Location
Philadelphia, PA, USA
ISSN
0149-645X
Print_ISBN
0-7803-7695-1
Type
conf
DOI
10.1109/MWSYM.2003.1211037
Filename
1211037
Link To Document