• DocumentCode
    163620
  • Title

    28nm Device improvement studies by replacing Indium with Gallium halo

  • Author

    Chin, Y.L. ; Wei, C.H. ; Yang, Cary Y. ; Yeh, S.W. ; Chang, W.F. ; Huang, S.C. ; Chiang, C.K. ; Chien, C.C. ; Lin, J.F. ; Wu, J.Y. ; Guo, B.N. ; Colombeau, B. ; Pradhan, N. ; Wu, Tsai-Fu ; Hou, Mengshu ; Chen, S. ; Chung, Chun-Jen ; Toh, T. ; Kouzminov, D

  • Author_Institution
    Adv. Technol. Dev. Div., United Microelectron. Corp., Tainan, Taiwan
  • fYear
    2014
  • fDate
    18-20 May 2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Optimization of halo profile for advanced MOSFET device is known to be very critical and challenging. Halo profiles around channel can cause carrier mobility degradation, leakage and higher Vt mismatch. Indium and high scattering P-type dopant (HS-P) mixed halo formation have been used widely for n-FET devices. Gallium has a better activation than Indium and is heavier specie than HS-P. Gallium could be promising specie for device improvement through halo optimization in planar devices or ground plane/retrograde well for better FinFET leakage characteristics. In this paper, Gallium is used to replace Indium halo on bare and device wafers using a poly-SiON 28nm process. Secondary Ion Mass Spectroscopy (SIMS) was employed for dopant profiles after anneals. Device gain in drive current with better Drain Induced Barrier Lowering or DIBL by 12mV was observed when Gallium replaced Indium in the HS-P/Indium mixed halo. The observed excessive device shift when Gallium was used to replace HS-P halo will be discussed in a future study. Ga for halo formation is not an plug/play and the interaction among the co-implant and dopant through implant induced damage should be investigated in the integration flow.
  • Keywords
    MOSFET; annealing; carrier mobility; gallium; secondary ion mass spectra; DIBL; FinFET leakage characteristics; Ga; HS-P mixed halo formation; SIMS; SiON; advanced MOSFET device; annealing; carrier mobility degradation; co-implant; device gain; device wafers; drain induced barrier lowering; gallium halo; ground plane-retrograde; halo profile optimization; high scattering p-type dopant; implant induced damage; indium halo; n-FET devices; planar devices; secondary ion mass spectroscopy; size 28 nm; voltage 12 mV; Annealing; Doping profiles; Gallium; Implants; Indium; Optimization; Random access memory;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Junction Technology (IWJT), 2014 International Workshop on
  • Conference_Location
    Shanghai
  • Type

    conf

  • DOI
    10.1109/IWJT.2014.6842053
  • Filename
    6842053