Title :
A 110 MHz 84 dB CMOS programmable gain amplifier with RSSI
Author :
Chun-Pang Wu ; Hen-Wai Tsao
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
This paper describes a CMOS programmable gain amplifier that maintains a 3 dB bandwidth greater than 110 MHz and can provide 84 dB gain control range in 1dB steps. The PGA can also The operated in a low power mode with 3 dB bandwidth greater than 71 MHz. Integrated with this PGA is a CMOS successive logarithmic detecting amplifier with a /spl plusmn/0.7dB logarithmic accuracy over 80 dB dynamic range. It achieves a sensitivity of -83 dBm. The amplifier consumes 13 mA from a single 3 V supply in high power mode. The chip area including pads occupies 1.5/spl times/ 1.5 mm/sup 2/.
Keywords :
CMOS analogue integrated circuits; VHF amplifiers; gain control; programmable circuits; radiofrequency integrated circuits; 110 MHz; 13 mA; 3 V; 71 MHz; CMOS programmable gain amplifier; CMOS successive logarithmic detecting amplifier; RSSI circuit; low power mode; received signal strength indicator circuit; Bandwidth; Baseband; Circuits; Dynamic range; Electronics packaging; Frequency; Gain control; Impedance; Signal design; Signal processing;
Conference_Titel :
Microwave Symposium Digest, 2003 IEEE MTT-S International
Conference_Location :
Philadelphia, PA, USA
Print_ISBN :
0-7803-7695-1
DOI :
10.1109/MWSYM.2003.1211050
