DocumentCode :
1636775
Title :
A 72mW CMOS 802.11a direct conversion receiver with 3.5dB NF and 200kHz 1/f noise corner
Author :
Montagna, G. ; Castello, R. ; Tonietto, R. ; Valla, M. ; Bietti, Ivan
Author_Institution :
Studio di Microelettronica, STMicroelectronics, Pavia, Italy
fYear :
2004
Firstpage :
16
Lastpage :
19
Abstract :
A direct conversion 802.11a receiver front-end including a synthesizer with quadrature VCO has been integrated in a 0.13 μm CMOS process. The chip has an active area of 1.8mm2 with the entire RF portion operated from 1.2V and the low frequency portion operated from 2.5V. Its key feature is a current driven passive mixer with a low impedance load that achieves a low 1/f noise corner. Measured noise figure is 3.5dB with a 1/f noise corner at 200kHz, and an IIP3 of -2dBm. The synthesizer DSB phase noise integrated over a 10MHz band is less than -36dBc. The front end reported here has one of the lowest power consumption and 1/f noise corner at 5GHz in pure CMOS ever reported so far.
Keywords :
1/f noise; CMOS integrated circuits; phase noise; voltage-controlled oscillators; 0.13 micron; 1.2 V; 1/f noise corner; 200 kHz; 3.5 dB; 72 mW; 72mW CMOS 802.11a direct conversion receiver; direct conversion receiver front-end; quadrature VCO; synthesizer; CMOS process; Energy consumption; Impedance; Low-frequency noise; Noise figure; Noise measurement; Phase noise; Radio frequency; Synthesizers; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8287-0
Type :
conf
DOI :
10.1109/VLSIC.2004.1346486
Filename :
1346486
Link To Document :
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