• DocumentCode
    1636919
  • Title

    Submicron-channel InGaAs MISFET with epitaxially grown source

  • Author

    Miyamoto, Yasuyuki ; Saito, Hisahi ; Kanazawa, Toru

  • Author_Institution
    Dept. of Phys. Electron., Tokyo Inst. of Technol., Tokyo, Japan
  • fYear
    2010
  • Firstpage
    1307
  • Lastpage
    1310
  • Abstract
    We would like to report our approaches to realize epitaxially grown source toward high drain current in III-V MISFET. One approach is an InP/InGaAs composite channel MISFET with regrown InGaAs source/drain. When gate length of 150 nm was fabricated, Id at Vd = 0.8 V was 0.8 A/mm and maximum gm was 0.38 S/mm at Vd = 0.5 V. The other approach is vertical FET. In case of vertical FET with dual gate, shrinking the mesa width of channel region is important for high speed operation. Thus we introduced undercut etching after fabrication of the mesa. In fabricated device, the width of channel mesa was 15 nm. Channel length was 60 nm. Observed drain current density at Vd = 0.75 V was 1.1 A/mm. Maximum gm was 0.53 S/mm.
  • Keywords
    III-V semiconductors; MISFET; etching; gallium arsenide; indium compounds; III-V MISFET; InP-InGaAs; epitaxially grown source; high drain current; regrown source-drain; size 15 nm; size 150 nm; size 60 nm; submicron-channel MISFET; undercut etching; vertical FET; voltage 0.5 V; voltage 0.75 V; voltage 0.8 V; Electrodes; Epitaxial growth; Etching; Indium gallium arsenide; Indium phosphide; Logic gates; MISFETs;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-5797-7
  • Type

    conf

  • DOI
    10.1109/ICSICT.2010.5667647
  • Filename
    5667647