DocumentCode
1637432
Title
A third-order ΣΔ modulator in 0.18 μm CMOS with calibrated mixed-mode integrators
Author
Shim, Jae Hoon ; Kim, Beomsup
Author_Institution
Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
fYear
2004
Firstpage
78
Lastpage
81
Abstract
A third-order EA modulator employing mixed-mode integrators has been designed and implemented in 0.18um CMOS process. Because the use of mixed-mode integrators allows a 12dB improvement in the dynamic range over conventional third-order architectures, the modulator can be driven with lower sampling frequency to achieve the same dynamic range. The modulator covers the dynamic range requirements of GSM and WCDMA applications with sampling frequencies of only 3.2MHz and 40MHz, respectively. The circuit occupies 0.7mm2 silicon area.
Keywords
CMOS integrated circuits; integrating circuits; mixed analogue-digital integrated circuits; sigma-delta modulation; 0.18 μm CMOS; 0.18 micron; 3.2 MHz; 40 MHz; calibrated mixed-mode integrators; dynamic range; third-order ΣΔ modulator; Circuits; Delta modulation; Dynamic range; Feedback; Frequency; GSM; Multiaccess communication; Sampling methods; Stability; Transfer functions;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN
0-7803-8287-0
Type
conf
DOI
10.1109/VLSIC.2004.1346510
Filename
1346510
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