Title :
Impact of hump effect on MOSFET mismatch in the sub-threshold area for low power analog applications
Author :
Joly, Yohan ; Lopez, Laurent ; Portal, Jean-Michel ; Aziza, Hassen ; Bert, Yannick ; Julien, Franck ; Fornara, Pascal
Author_Institution :
STMicroelectronics, Rousset, France
Abstract :
Analog circuit designs are often biased to work in sub-threshold mode with good gate-source voltage matching performances. Depending on the process, hump effect may change the MOS characteristics for negative Bulk-Source Voltage (VBS) and have a slight impact for VBS=0V. To model the hump effect, two narrow parasitic MOS are introduced in parallel with the main device. To accurately simulate matching degradation in sub-threshold mode, these parasitic transistors, in case of hump effect, have to be considered.
Keywords :
MOSFET; analogue circuits; low-power electronics; transistors; MOSFET mismatch; analog circuit design; bulk-source voltage; gate-source voltage matching performance; hump effect; low power analog application; parasitic transistor; sub-threshold area; sub-threshold mode; Current measurement; Data models; Logic gates; MOS devices; Mathematical model; Transistors; Voltage measurement;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
DOI :
10.1109/ICSICT.2010.5667684
