DocumentCode :
1638070
Title :
5-6.4 Gbps 12 channel transceiver with pre-emphasis and equalizer
Author :
Higashi, Hirohito ; Masaki, Syunitirou ; Kibune, Masaya ; Matsubara, Satoshi ; Chiba, Takaya ; Doi, Yoshiyasu ; Yamaguchi, Hisakatsu ; Takauchi, Hideki ; Ishida, Hideki ; Gotoh, Kohtaroh ; Tamura, Hirotaka
Author_Institution :
Fujitsu Labs. Ltd., Kawasaki, Japan
fYear :
2004
Firstpage :
130
Lastpage :
133
Abstract :
A 5 Gbps to 6.4 Gbps transceiver consists of a parallel 12-channel transmitter (Tx), 12-channel receiver (Rx), clock generators based on LC-VCO PLLs, and a clock recovery unit. The Tx has a 5-tap pre-emphasis filter, and the Rx has an equalizer with intersymbol interference (ISI) monitor. Monitoring the ISI enables a fine adjustment of the loss compensation. The pre-emphasis filter in the Tx and the equalizer in the Rx can compensate for a transmission loss of up to 20 dB and 15 dB at 6.4 Gbps, respectively. The areas of the Tx and Rx channels including the PLLs are both 3.92 mm2. The transmitter dissipates 150 mW/channel at 6.4 Gbps when compensating for a loss of 20 dB, the receiver 90 mW/channel when compensating for 15 dB loss.
Keywords :
CMOS integrated circuits; equalisers; phase locked loops; transceivers; voltage-controlled oscillators; 15 dB; 20 dB; 5 to 6.4 Gbit/s; 5-6.4 Gbps 12 channel transceiver; LC-VCO; clock generators; clock recovery unit; equalizer; pre-emphasis; transmission loss; Adaptive equalizers; Circuits; Clocks; Finite impulse response filter; Intersymbol interference; Monitoring; Phase locked loops; Propagation losses; Transceivers; Transmitters;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8287-0
Type :
conf
DOI :
10.1109/VLSIC.2004.1346533
Filename :
1346533
Link To Document :
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