DocumentCode :
163825
Title :
Novel approaches to quantify failure probability due to process variations in nano-scale CMOS logic
Author :
Khalid, Usman ; Mastrandrea, Antonio ; Olivieri, Mauro
Author_Institution :
Dept. of Inf. Eng. Electron. & Telecommun., Sapienza Univ. of Rome, Rome, Italy
fYear :
2014
fDate :
12-14 May 2014
Firstpage :
371
Lastpage :
374
Abstract :
Estimating the failure probability of nano-scale generic logic cells is a key point for the evaluation of digital system reliability. Noise-induced input variations with process-induced threshold voltage variations affect the probability of correct operation of logic cells. This work quantitatively analyses the probability of invalid output of a cell by introducing novel analytical and semi-analytical approaches in comparison with SPICE Monte-Carlo verification approach.
Keywords :
CMOS logic circuits; failure analysis; logic circuits; probability; SPICE Monte-Carlo verification approach; digital system reliability; failure probability; invalid output; nanoscale CMOS logic; nanoscale generic logic cells; noise-induced input variations; process-induced threshold voltage variations; semi-analytical approaches; CMOS integrated circuits; Integrated circuit modeling; Inverters; SPICE; Semiconductor device modeling; Standards; Threshold voltage; Probability of Failure; Process variations; Reliability; digital VLSI circuits; nano-CMOS circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics Proceedings - MIEL 2014, 2014 29th International Conference on
Conference_Location :
Belgrade
Print_ISBN :
978-1-4799-5295-3
Type :
conf
DOI :
10.1109/MIEL.2014.6842167
Filename :
6842167
Link To Document :
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