An Experimental 16mb Cmos dram Chip with a 100mhz Serial Read/Write Mode
Author :
Watanabe, S. ; Itoh, Y. ; Sakui, K. ; Numata, K. ; Oowaki, Y. ; Fuse, T. ; Kobayashi, T. ; Tsuchida, K. ; Chiba, M. ; Hara, T. ; Ohta, M. ; Horiguchi, F. ; Ohuchi, K. ; Masuoka, F.
Author_Institution :
Toshiba VLSl Research Center, Kawasaki, Japan
fYear :
1988
Firstpage :
248
Keywords :
CMOS technology; Capacitance; Capacitors; Circuits; Clocks; Fuses; Paper technology; Random access memory; Shift registers; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1988. Digest of Technical Papers. ISSCC. 1988 IEEE International
