DocumentCode :
1638292
Title :
A monolithic high frequency digitally controlled Buck converter in 0.13µm CMOS process
Author :
Sijian, Hou ; Xiao, Ma ; Shaowei, Zhen ; Ping, Luo ; Bo, Zhang
Author_Institution :
State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Cheng Du, China
fYear :
2010
Firstpage :
421
Lastpage :
423
Abstract :
This paper described a digitally controlled Buck converter. In this converter, the compensator implements the classic linear PID control law by the fixed-point algorithm. A proposed verification method is performed in Simulink environment. The structure of low area and power cost Ring ADC and high resolution DPWM is also introduced, respectively. The consistent mathematic and Spice simulation result demonstrate the design validity of the whole system.
Keywords :
CMOS integrated circuits; fixed point arithmetic; power convertors; three-term control; CMOS process; Simulink environment; classic linear PID control law; fixed-point algorithm; monolithic high frequency digitally controlled Buck converter; Converters; Delay; Load modeling; Mathematical model; Radiation detectors; Simulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-5797-7
Type :
conf
DOI :
10.1109/ICSICT.2010.5667692
Filename :
5667692
Link To Document :
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