DocumentCode
1638308
Title
A CMOS 64MSps 20mA 0.85mm2 baseband I/Q modulator performing 13 bits over 2MHz bandwidth
Author
Pinna, Carlo ; Mecchia, Alessandro ; Nicollini, Germano
Author_Institution
Cellular Terminal Div., STMicroelectronics - Telecom Group, Milano, Italy
fYear
2004
Firstpage
152
Lastpage
155
Abstract
A CMOS 64MSps 2-1-1 cascaded ΣΔ I/Q modulator optimized for WCDMA applications achieves more than 13 bits over 2MHz bandwidth. A new way for sizing cascaded ΣΔ architectures based on comparator equivalent gain, and an improved dynamic element matching method resulted into an area and power efficient modulator design. The total consumption of two modulators plus built-in voltage and current reference generators is about 20mA at 2.7V. Total active area is 0.85mm2 in a 0.35 μm CMOS technology.
Keywords
CMOS integrated circuits; code division multiple access; power consumption; sigma-delta modulation; 0.35 micron; 2 MHz; 2.7 V; 20 mA; CMOS 64MSps 20mA 0.85mm2 baseband I/Q modulator; cascaded ΣΔ I/Q modulator; comparator equivalent gain; dynamic element matching method; Bandwidth; Baseband; CMOS technology; Filters; Multi-stage noise shaping; Multiaccess communication; Quantization; Standards development; Telecommunications; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN
0-7803-8287-0
Type
conf
DOI
10.1109/VLSIC.2004.1346540
Filename
1346540
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