A COFDM baseband processor with robust synchronization for high-speed WLAN applications

Author

Liu, Hsuan-Yu ; Yu, Yi-Hsin ; Lin, Chien-Ching ; Chung, Ching-Che ; Hsu, Temg-Yi ; Lee, Chen-Yi

Author_Institution

Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

fYear

2004

Firstpage

156

Lastpage

159

Abstract

In this paper, a high-performance and low-cost COFDM baseband processor is presented. With algorithm exploration in channel estimation and phase error tracking, synchronization becomes more robust to enhance system performance. And better design SNR (1.35∼7.16dB) can be achieved compared to current solutions. Moreover through architectural exploration, the proposed baseband processor designed in 0.18um CMOS process contains only 370K logic gates and 3.3Kbyte memory. Measurement results show that better hardware efficiency and performance enhancement is achieved for high-speed WLAN applications.

Keywords

CMOS integrated circuits; OFDM modulation; channel estimation; synchronisation; wireless LAN; 0.18 micron; COFDM baseband processor; algorithm exploration; channel estimation; high-speed WLAN applications; phase error tracking; robust synchronization; synchronization; Baseband; CMOS logic circuits; CMOS process; Channel estimation; Logic design; Logic gates; Process design; Robustness; System performance; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on

Print_ISBN

0-7803-8287-0

Type

conf

DOI

10.1109/VLSIC.2004.1346541

Filename

1346541