Title :
An area-efficient implementation of digital-IF QAM coherent demodulator for software-defined radio receivers
Author :
Song, Yongehul ; Kim, Jeongpyo ; Kim, Beomsup
Author_Institution :
Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
Abstract :
This paper presents a digital-IF QAM coherent demodulator implemented on 0.11-mm2 die area. Two independent resampling circuits with second-order digital tracking loops are employed in order to achieve both the carrier and timing recoveries. A coherent demodulator with complete digital synchronization functions achieves a bit-error rate of 10-6 with an implementation loss of 0.6 dB for uncoded 16-QAM signal. It consumes 16 mW with a 1.8-V supply, working in 80 MHz.
Keywords :
CMOS integrated circuits; analogue-digital conversion; quadrature amplitude modulation; software radio; synchronisation; 0.6 dB; 1.8 V; 16 mW; 80 MHz; area-efficient implementation; bit-error rate; carrier recoveries; complete digital synchronization functions; digital-IF QAM coherent demodulator; implementation loss; independent resampling circuits; second-order digital tracking loops; software-defined radio receivers; timing recoveries; Baseband; Circuits; Demodulation; Digital signal processing; Filters; Frequency; Quadrature amplitude modulation; Receivers; Signal sampling; Timing;
Conference_Titel :
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8287-0
DOI :
10.1109/VLSIC.2004.1346542
