Title :
An area-efficient, integrated, linear regulator with ultra-fast load regulation
Author :
Hazucha, Peter ; Karnik, Tanay ; Bloechel, Bradley ; Parsons, Colleen ; Finan, David ; Borkar, Shekhar
Author_Institution :
Circuits Res., Intel Labs, Hillsboro, OR, USA
Abstract :
We demonstrate a fully-integrated linear regulator for multi-supply-voltage microprocessors implemented in a 90 nm CMOS technology. Ultra-fast, single-stage load regulation achieves 0.54 ns response time at 94% current efficiency. This enables 10% peak-to-peak output noise for a 100 mA load step with only a small on-chip decoupling capacitor of 0.6 nF. A PMOS pull-up transistor in the output stage results in a small regulator area of 0.008 mm2 and the 0.6 nF MOS capacitor area of 0.090 mm2.
Keywords :
CMOS integrated circuits; load regulation; microprocessor chips; transient response; 0.54 ns; 90 nm; 90 nm CMOS technology; PMOS pull-up transistor; area-efficient integrated linear regulator; current efficiency; multi-supply-voltage microprocessor; peak-to-peak output noise; response time; small on-chip decoupling capacitor; ultra-fast load regulation; CMOS technology; Circuit noise; Circuit topology; Delay; Integrated circuit technology; Logic circuits; Low voltage; MOS capacitors; Microprocessors; Regulators;
Conference_Titel :
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8287-0
DOI :
10.1109/VLSIC.2004.1346565
