Accurate CMOS switched-current divider circuits

Author

Wang, Jin-Sheng ; Wey, Chin-Long

Author_Institution

Dept. of Electr. Eng., Michigan State Univ., East Lansing, MI, USA

Volume

1

fYear

1998

Firstpage

53

Abstract

This paper presents a highly accurate current divider using switched-current (SI) technique. The circuit accurately divides an input current by two with 3 cycles at each iteration. The accuracy of the division increases as the number of iterations increases. In practice, however, the accuracy is limited due to the clock-feedthrough errors. The issue of accuracy limitation is addressed. The extension to array structures for low-power/low-voltage A/D and D/A converter circuit designs is also discussed

Keywords

CMOS analogue integrated circuits; analogue-digital conversion; digital-analogue conversion; dividing circuits; iterative methods; switched current circuits; A/D converter circuit; CMOS; D/A converter circuit; accuracy limitation; array structures; clock-feedthrough errors; input current; iterations; low-power circuits; low-voltage circuits; switched-current divider circuits; Analog circuits; CMOS technology; Capacitance; Circuit synthesis; Clocks; Coupling circuits; Resistors; Switching circuits; Transistors; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-4455-3

Type

conf

DOI

10.1109/ISCAS.1998.704173

Filename

704173