Integration of ultrathin (1.6/spl sim/2.0 nm) RPECVD oxynitride gate dielectrics into dual poly-Si gate submicron CMOSFETs

Detailed comparisons indicates superior performance and reliability in dual poly-Si gate CMOSFETs in which oxynitride alloys have been substituted for nitrides of stacked oxide/nitride dielectrics with Tox-eq /spl sim/2 nm. Similar comparisons using CMOSFETs with optimized oxide/oxynitride stacked dielectrics (Tox-eq /spl sim/1.67 nm) which also include interface plasma-nitridation at the one monolayer level are reported. These also indicate superior performance and reliability with respect to CMOSFET devices with stacked oxide/nitride dielectrics, including an additional /spl sim/10/spl times/ decrease in direct tunneling due to the interface nitridation.