• DocumentCode
    1639428
  • Title

    An improved area-efficient design method for interpolation filter of Sigma-Delta audio DAC

  • Author

    Li, Jing ; Wu, Xiao-Bo ; Zhao, Jin-Chen

  • Author_Institution
    Inst. of VLSI Design, Zhejiang Univ., Hangzhou, China
  • fYear
    2010
  • Firstpage
    327
  • Lastpage
    329
  • Abstract
    This paper presents an improved area-efficient design method to construct interpolation filter of Sigma-Delta audio digital-to-analog converter (DAC). Several architectures and implementation techniques are adopted to reduce the complexity of the system. The Matlab simulation, FPGA verification and digital synthesis are performed to support the feasibility of the presented method. The cell area of the interpolation filter built by this method is 0.33mm2 in TSMC 0.18μm COMS process.
  • Keywords
    digital filters; digital-analogue conversion; field programmable gate arrays; mathematics computing; sigma-delta modulation; CMOS process; FPGA verification; Matlab simulation; TSMC; area-efficient design; digital synthesis; interpolation filter; sigma-delta audio DAC; sigma-delta audio digital-to-analog converter;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4244-5797-7
  • Type

    conf

  • DOI
    10.1109/ICSICT.2010.5667733
  • Filename
    5667733
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1639428